1. Field of the Invention
The present invention relates to a method of designing semiconductor devices and a method of manufacturing semiconductor devices using the designing method, and particularly to a method of designing semiconductor devices taking account of parasitic capacitance and a method of manufacturing semiconductor devices using the designing method.
2. Background Art
A memory cell of a nonvolatile semiconductor device has a floating gate formed on a semiconductor substrate through a gate insulating film, and a control gate formed on the floating gate through an insulating film. The both gates are electrostatically coupled with each other, and when a voltage is applied to the control gate, the voltage is applied to the floating gate through the insulating film. An electric field generated between the floating gate and the silicon substrate (Si) in response to the voltage applied to the floating gate brings about a tunnel effect in the gate insulating film, causing an injection or emission of electrons into or from the floating gate. In this way, a nonvolatile semiconductor device enables writing and deleting operations by injecting or emitting electrons into or from the floating gate.
Therefore, in designing the structure of a memory cell, it is necessary to accurately estimate the effect of the electrical potential from adjacent cells, and to keep it below a certain level. For example, Japanese patent laid-open publication JP-A 2006-196114(Kokai) discloses a method providing a reference transistor to calculate the coupling ratio of gate capacitances, and then to set the control gate voltage by accurately evaluating the coupling ratio.
Various simulations have been also applied. For example, Japanese patent laid-open publication JP-A 2001-28405(Kokai) discloses a method to combine process simulation and device simulation to execute more accurate capacitance simulation.
However, since process simulation and device simulation takes enormous amount of time, it is difficult to feedback the design values to the products without delay.